Embedded SoPC design with NIOS II processor and Verilog examples / (Record no. 63031)
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| 001 - CONTROL NUMBER | |
| control field | sulb-eb0031379 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | BD-SySUS |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20170713221257.0 |
| 006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS | |
| fixed length control field | m o d |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr cn||||||||| |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 120125s2012 nju ob 001 0 eng |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER | |
| LC control number | 2012003493 |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | DLC |
| Language of cataloging | eng |
| Description conventions | pn |
| Transcribing agency | DLC |
| Modifying agency | EBLCP |
| -- | N$T |
| -- | YDXCP |
| -- | MERUC |
| -- | CDX |
| -- | DG1 |
| -- | OCLCQ |
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| -- | BD-SySUS |
| 019 ## - | |
| -- | 795914176 |
| -- | 817082380 |
| -- | 825072133 |
| -- | 961530788 |
| -- | 962709321 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9781118309469 |
| Qualifying information | (electronic bk.) |
| International Standard Book Number | 1118309464 |
| Qualifying information | (electronic bk.) |
| International Standard Book Number | 9781118309728 |
| Qualifying information | (electronic bk.) |
| International Standard Book Number | 1118309723 |
| Qualifying information | (electronic bk.) |
| International Standard Book Number | 1280592397 |
| International Standard Book Number | 9781280592393 |
| International Standard Book Number | 1118011031 |
| International Standard Book Number | 9781118011034 |
| Canceled/invalid ISBN | 9781118309445 |
| Canceled/invalid ISBN | 1118309448 |
| Canceled/invalid ISBN | 1118309464 |
| Canceled/invalid ISBN | 9781118309575 |
| Canceled/invalid ISBN | 111830957X |
| Canceled/invalid ISBN | 9781118011034 |
| Qualifying information | (hardback) |
| 029 1# - OTHER SYSTEM CONTROL NUMBER (OCLC) | |
| OCLC library identifier | AU@ |
| System control number | 000050492075 |
| OCLC library identifier | DEBBG |
| System control number | BV041120988 |
| OCLC library identifier | DEBBG |
| System control number | BV041908621 |
| OCLC library identifier | DEBSZ |
| System control number | 396759076 |
| OCLC library identifier | DEBSZ |
| System control number | 431073015 |
| OCLC library identifier | DKDLA |
| System control number | 820120-katalog:000600381 |
| OCLC library identifier | NZ1 |
| System control number | 14699130 |
| 035 ## - SYSTEM CONTROL NUMBER | |
| System control number | (OCoLC)774024203 |
| Canceled/invalid control number | (OCoLC)795914176 |
| -- | (OCoLC)817082380 |
| -- | (OCoLC)825072133 |
| -- | (OCoLC)961530788 |
| -- | (OCoLC)962709321 |
| 037 ## - SOURCE OF ACQUISITION | |
| Stock number | 10.1002/9781118309728 |
| Source of stock number/acquisition | Wiley InterScience |
| Note | http://www3.interscience.wiley.com |
| 042 ## - AUTHENTICATION CODE | |
| Authentication code | pcc |
| 050 10 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK7895.E42 |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | COM |
| Subject category code subdivision | 000000 |
| Source | bisacsh |
| 082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 006.2/2 |
| Edition number | 23 |
| 084 ## - OTHER CLASSIFICATION NUMBER | |
| Classification number | TEC008010 |
| Number source | bisacsh |
| 049 ## - LOCAL HOLDINGS (OCLC) | |
| Holding library | MAIN |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Chu, Pong P., |
| Dates associated with a name | 1959- |
| 245 10 - TITLE STATEMENT | |
| Title | Embedded SoPC design with NIOS II processor and Verilog examples / |
| Statement of responsibility, etc. | Pong P. Chu. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication, distribution, etc. | Hoboken, N.J. : |
| Name of publisher, distributor, etc. | Wiley, |
| Date of publication, distribution, etc. | ©2012. |
| 263 ## - PROJECTED PUBLICATION DATE | |
| Projected publication date | 1205 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 1 online resource. |
| 336 ## - CONTENT TYPE | |
| Content type term | text |
| Content type code | txt |
| Source | rdacontent |
| 337 ## - MEDIA TYPE | |
| Media type term | computer |
| Media type code | c |
| Source | rdamedia |
| 338 ## - CARRIER TYPE | |
| Carrier type term | online resource |
| Carrier type code | cr |
| Source | rdacarrier |
| 347 ## - DIGITAL FILE CHARACTERISTICS | |
| File type | data file |
| Source | rda |
| 380 ## - FORM OF WORK | |
| Form of work | Bibliography |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE | |
| Bibliography, etc | Includes bibliographical references and index. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc. | "This book explores the unique hardware programmability of FPGA (field-programmable gate array)-based embedded systems, using a learning-by-doing approach to introduce the concepts and techniques for embedded SoPC (system on a programmable chip) systems with Verilog. The book contains a large number of practical examples to illustrate and reinforce the hardware and software design concepts and techniques, as well as a complete code listing and experiment problems. The book is designed for upper-level undergraduate and entry-level graduate students in computer engineering, as well as practicing engineers"-- |
| Assigning source | Provided by publisher. |
| Summary, etc. | "The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures"-- |
| Assigning source | Provided by publisher. |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Embedded SoPC Design With Nios II Processor And Verilog Examples; Contents; Preface; Acknowledgments; 1 Overview of Embedded System; 1.1 Introduction; 1.1.1 Definition of an embedded system; 1.1.2 Example systems; 1.2 System design requirements; 1.3 Embedded SoPC systems; 1.3.1 Basic development flow; 1.4 Book organization; 1.5 Bibliographic notes; PART I BASIC DIGITAL CIRCUITS DEVELOPMENT; 2 Gate-level Combinational Circuit; 2.1 Introduction; 2.2 General description; 2.3 Basic lexical elements and data types; 2.3.1 Lexical elements; 2.4 Data types; 2.4.1 Four-value system. |
| 588 0# - SOURCE OF DESCRIPTION NOTE | |
| Source of description note | Print version record. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Embedded computer systems. |
| Topical term or geographic name as entry element | Field programmable gate arrays. |
| Topical term or geographic name as entry element | Verilog (Computer hardware description language) |
| Topical term or geographic name as entry element | Embedded computer systems. |
| Topical term or geographic name as entry element | Systems on a chip. |
| Topical term or geographic name as entry element | Field programmable gate arrays. |
| Topical term or geographic name as entry element | Computer input-output equipment |
| General subdivision | Design and construction. |
| Topical term or geographic name as entry element | Verilog (Computer hardware description language) |
| Topical term or geographic name as entry element | TECHNOLOGY & ENGINEERING |
| General subdivision | Electronics |
| -- | Circuits |
| -- | General. |
| Source of heading or term | bisacsh |
| Topical term or geographic name as entry element | COMPUTERS |
| General subdivision | General. |
| Source of heading or term | bisacsh |
| Topical term or geographic name as entry element | Embedded computer systems. |
| Source of heading or term | fast |
| Authority record control number | (OCoLC)fst00908298 |
| Topical term or geographic name as entry element | Field programmable gate arrays. |
| Source of heading or term | fast |
| Authority record control number | (OCoLC)fst00923910 |
| Topical term or geographic name as entry element | Verilog (Computer hardware description language) |
| Source of heading or term | fast |
| Authority record control number | (OCoLC)fst01165388 |
| Topical term or geographic name as entry element | Embedded computer systems. |
| Source of heading or term | local |
| Topical term or geographic name as entry element | Systems on a chip. |
| Source of heading or term | local |
| Topical term or geographic name as entry element | Field programmable gate arrays. |
| Source of heading or term | local |
| Topical term or geographic name as entry element | Computer input-output equipment / Design and construction. |
| Source of heading or term | local |
| Topical term or geographic name as entry element | Verilog (Computer hardware description language) |
| Source of heading or term | local |
| 655 #4 - INDEX TERM--GENRE/FORM | |
| Genre/form data or focus term | Electronic books. |
| Genre/form data or focus term | Electronic books. |
| Source of term | local |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Relationship information | Print version: |
| Main entry heading | Chu, Pong P., 1959- |
| Title | Embedded SoPC design with NIOS II processor and Verilog examples. |
| Place, publisher, and date of publication | Hoboken, N.J. : Wiley, ©2012 |
| International Standard Book Number | 9781118011034 |
| Record control number | (DLC) 2011048946 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | <a href="http://onlinelibrary.wiley.com/book/10.1002/9781118309728">http://onlinelibrary.wiley.com/book/10.1002/9781118309728</a> |
| Public note | Wiley Online Library [Free Download only for SUST IP] |
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