Welcome to Central Library, SUST
Amazon cover image
Image from Amazon.com
Image from Google Jackets

Electromigration Modeling at Circuit Layout Level [electronic resource] / by Cher Ming Tan, Feifei He.

By: Contributor(s): Material type: TextTextSeries: SpringerBriefs in Applied Sciences and TechnologyPublisher: Singapore : Springer Singapore : Imprint: Springer, 2013Description: IX, 103 p. 75 illus., 2 illus. in color. online resourceContent type:
  • text
Media type:
  • computer
Carrier type:
  • online resource
ISBN:
  • 9789814451215
Subject(s): Additional physical formats: Printed edition:: No titleDDC classification:
  • 658.56 23
LOC classification:
  • TA169.7
  • T55-T55.3
  • TA403.6
Online resources:
Contents:
Introduction -- 3D Circuit Model Construction and Simulation -- Comparison of EM Performance in Circuit Structure and Test Structure -- Interconnect EM Reliability Modeling at Circuit Layout Level -- Conclusion.
In: Springer eBooksSummary: Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels.  Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level. .
Tags from this library: No tags from this library for this title. Log in to add tags.
Star ratings
    Average rating: 0.0 (0 votes)
No physical items for this record

Introduction -- 3D Circuit Model Construction and Simulation -- Comparison of EM Performance in Circuit Structure and Test Structure -- Interconnect EM Reliability Modeling at Circuit Layout Level -- Conclusion.

Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels.  Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level. .

There are no comments on this title.

to post a comment.