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008 120811s2013 xxk| s |||| 0|eng d
020 _a9781447142102
_9978-1-4471-4210-2
024 7 _a10.1007/978-1-4471-4210-2
_2doi
050 4 _aTK1-9971
072 7 _aTJK
_2bicssc
072 7 _aTEC041000
_2bisacsh
082 0 4 _a621.382
_223
100 1 _aPelcat, Maxime.
_eauthor.
245 1 0 _aPhysical Layer Multi-Core Prototyping
_h[electronic resource] :
_bA Dataflow-Based Approach for LTE eNodeB /
_cby Maxime Pelcat, Slaheddine Aridhi, Jonathan Piat, Jean-François Nezan.
264 1 _aLondon :
_bSpringer London :
_bImprint: Springer,
_c2013.
300 _aXVI, 212 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aLecture Notes in Electrical Engineering,
_x1876-1100 ;
_v171
505 0 _a3GPP Long Term Evolution -- Dataflow Model of Computation -- Rapid Prototyping and Programming Multi-core Architectures -- A System-Level Architecture Model -- Enhanced Rapid Prototyping -- Dataflow LTE Models -- Generating Code from LTE Models.
520 _aBase stations developed according to the 3GPP Long Term Evolution (LTE) standard require unprecedented processing power. 3GPP LTE enables data rates beyond hundreds of Mbits/s by using advanced technologies, necessitating a highly complex LTE physical layer. The operating power of base stations is a significant cost for operators, and is currently optimized using state-of-the-art hardware solutions, such as heterogeneous distributed systems. The traditional system design method of porting algorithms to heterogeneous distributed systems based on test-and-refine methods is a manual, thus time-expensive, task.   Physical Layer Multi-Core Prototyping: A Dataflow-Based Approach for LTE eNodeB provides a clear introduction to the 3GPP LTE physical layer and to dataflow-based prototyping and programming. The difficulties in the process of 3GPP LTE physical layer porting are outlined, with particular focus on automatic partitioning and scheduling, load balancing and computation latency reduction, specifically in systems based on heterogeneous multi-core Digital Signal Processors. Multi-core prototyping methods based on algorithm dataflow modeling and architecture system-level modeling are assessed with the goal of automating and optimizing algorithm porting.   With its analysis of physical layer processing and proposals of parallel programming methods, which include automatic partitioning and scheduling, Physical Layer Multi-Core Prototyping: A Dataflow-Based Approach for LTE eNodeB is a key resource for researchers and students. This study of LTE algorithms which require dynamic or static assignment and dynamic or static scheduling, allows readers to reassess and expand their knowledge of this vital component of LTE base station design.
650 0 _aEngineering.
650 0 _aSoftware engineering.
650 0 _aEngineering design.
650 0 _aElectrical engineering.
650 0 _aElectronic circuits.
650 1 4 _aEngineering.
650 2 4 _aCommunications Engineering, Networks.
650 2 4 _aCircuits and Systems.
650 2 4 _aSoftware Engineering.
650 2 4 _aEngineering Design.
700 1 _aAridhi, Slaheddine.
_eauthor.
700 1 _aPiat, Jonathan.
_eauthor.
700 1 _aNezan, Jean-François.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9781447142096
830 0 _aLecture Notes in Electrical Engineering,
_x1876-1100 ;
_v171
856 4 0 _uhttp://dx.doi.org/10.1007/978-1-4471-4210-2
912 _aZDB-2-ENG
942 _2Dewey Decimal Classification
_ceBooks
999 _c43527
_d43527