000			01382nam a22003257a 4500
001			sulbI000244
003			BD-SySUS
005			20160522121400.0
008			160522s2006 nyu a|||b|||| 001 0 eng d
020			_a0849379237
020			_a9780849379239
020			_a0849330963 (set)
020			_a9780849330964 (set)
040			_aDLC _cDLC _dBD-SySUS
082	0	0	_a621.3815 _222 _bEDA
245	0	0	_aEDA for IC system design, verification, and testing / _cedited by Louis Scheffer, Luciano Lavagno, Grant Martin.
246	3		_aElectronic design automation for integrated circuit system design, verification, and testing
260			_aNew york : _bCRC Taylor & Francis, _cc2006.
300			_a (various pagings) : _bill. ; _c27 cm.
440		0	_aElectronic design automation for integrated circuits handbook _924276
500			_aCompanion volume of: EDA for IC implementation, circuit design, and process technology.
504			_aIncludes bibliographical references and index.
650		0	_aIntegrated circuits _xComputer-aided design. _924277
650		0	_aIntegrated circuits _xVerification _xData processing. _924278
700	1		_aScheffer, Louis Kossuth. _924279
700	1		_aLavagno, Luciano, _d1959- _924280
700	1		_aMartin, Grant _q(Grant Edmund) _924281
730	0		_aEDA for IC implementation, circuit design, and process technology. _924282
942			_2ddc _cBK
999			_c60529 _d60529