| 000 | 00800nam a22002417a 4500 | ||
|---|---|---|---|
| 001 | SulbI000970 | ||
| 003 | BD-SySUS | ||
| 005 | 20160524150547.0 | ||
| 008 | 160524s2011 nyua 001 0 eng d | ||
| 010 | _a 2011926118 | ||
| 020 | _a9781441992956 (alk. paper) | ||
| 020 | _a9781441992963 (eISBN) | ||
| 040 |
_aYDXCP _cYDXCP _dUKMGB _dBD-SySUS |
||
| 082 | 0 | 0 |
_a621.3815 _222 _bCHP |
| 100 | 1 |
_aChuriwala, Sanjay. _925363 |
|
| 245 | 1 | 0 |
_aPrinciples of VLSI RTL design : _ba practical guide / _cSanjay Churiwala, Sapan Garg ; foreword by Mike Gianfagna. |
| 260 |
_aNew York : _bSpringer, _cc2011 |
||
| 300 |
_axv, 182 p. : _bill. ; _c25 cm. |
||
| 500 | _aIncludes index. | ||
| 650 | 0 |
_aIntegrated circuits _xVery large scale integration. _924674 |
|
| 700 | 1 |
_aGarga, Sapan. _925364 |
|
| 942 |
_2ddc _cBK |
||
| 999 |
_c60914 _d60914 |
||