000			05040cam a2200757Ka 4500
001			sulb-eb0030994
003			BD-SySUS
005			20170713221243.0
006			m o d
007			cr cn|||||||||
008			110706s2011 nyu ob 001 0 eng d
040			_aDG1 _beng _epn _cDG1 _dIDEBK _dOCLCQ _dHS0 _dOCLCQ _dOCLCO _dOCLCF _dOCLCA _dUKDOC _dB24X7 _dCOO _dOCLCQ _dYDXCP _dDEBBG _dEBLCP _dOCLCQ _dDG1 _dBD-SySUS
019			_a743204800 _a758543273 _a816850580 _a832584116
020			_a9780470828519 _q(electronic bk.)
020			_a047082851X _q(electronic bk.)
020			_a1283175169
020			_a9781283175166
020			_a9780470828502 _q(ePDF)
020			_a0470828501 _q(ePDF)
020			_a9780470828526 _q(ePub)
020			_a0470828528 _q(ePub)
020			_a9781118073315 _q(Mobi)
020			_a1118073312 _q(Mobi)
020			_z9780470828496 _q(hardback)
020			_z0470828498 _q(hardback)
029	1		_aAU@ _b000047794885
029	1		_aDEBBG _bBV041908414
029	1		_aDKDLA _b820120-katalog:000572513
029	1		_aNZ1 _b13789058
029	1		_aNZ1 _b15290958
029	1		_aDEBBG _bBV041874369
035			_a(OCoLC)739118465 _z(OCoLC)743204800 _z(OCoLC)758543273 _z(OCoLC)816850580 _z(OCoLC)832584116
037			_a10.1002/9780470828519 _bWiley InterScience _nhttp://www3.interscience.wiley.com
050		4	_aTK7895.E42 _bB3264 2011
082	0	4	_a621.39/9 _222
049			_aMAIN
100	1		_aBailey, Donald G. _q(Donald Graeme), _d1962-
245	1	0	_aDesign for embedded image processing on FPGAs / _cDonald G. Bailey.
260			_aNew York, NY : _bWiley, _c2011.
300			_a1 online resource
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
505	0		_aFront Matter -- Colour Plates -- Image Processing -- Field Programmable Gate Arrays -- Languages -- Design Process -- Mapping Techniques -- Point Operations -- Histogram Operations -- Local Filters -- Geometric Transformations -- Linear Transforms -- Blob Detection and Labelling -- Interfacing -- Testing, Tuning and Debugging -- Example Applications -- References -- Index.
520			_a"Introductory material will consider the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit parallelism within many image processing algorithms. A brief review of FPGA programming languages provides the link between a software mindset normally associated with image processing algorithms, and the hardware mindset required for efficient utilization of a parallel hardware design. The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation. Particular attention is given to the techniques for mapping an algorithm onto an FPGA implementation, considering timing, memory bandwidth and resource constraints, and efficient hardware computational techniques. Extensive coverage will be given of a range of image processing operations, discussing efficient implementations and how these may vary according to the application. The techniques will be illustrated with several example applications or case studies from projects or applications I have been involves with. Issues such as interfacing between the FPGA and peripheral devices will be covered briefly, as will designing the system in such a way that it can be more readily debugged and tuned"-- _cProvided by publisher.
520			_a"The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation"-- _cProvided by publisher.
504			_aIncludes bibliographical references and index.
588	0		_aPrint version record.
650		0	_aEmbedded computer systems.
650		0	_aField programmable gate arrays.
650		7	_aTECHNOLOGY & ENGINEERING _xElectronics _xMicroelectronics. _2bisacsh
650		7	_aEmbedded computer systems. _2fast _0(OCoLC)fst00908298
650		7	_aField programmable gate arrays. _2fast _0(OCoLC)fst00923910
655		4	_aElectronic books.
655		4	_aElectronic resource.
710	2		_aWiley InterScience (Online service)
776	0	8	_iPrint version: _aBailey, Donald G. (Donald Graeme), 1962- _tDesign for embedded image processing on FPGAs. _dNew York, NY : Wiley, 2011 _z9780470828496 _w(DLC) 2011002991 _w(OCoLC)690090010
856	4	0	_uhttp://onlinelibrary.wiley.com/book/10.1002/9780470828519 _zWiley Online Library [Free Download only for SUST IP]
938			_a123Library _b123L _n19446
938			_aBooks 24x7 _bB247 _nbke00041720
938			_aEBL - Ebook Library _bEBLB _nEBL4025546
938			_aIngram Digital eBook Collection _bIDEB _n317516
938			_aYBP Library Services _bYANK _n5559468
938			_aYBP Library Services _bYANK _n3655388
994			_a92 _bDG1
999			_c62646 _d62646