Finite State Machine Logic Synthesis for Complex Programmable Logic Devices (Record no. 46745)
[ view plain ]
| 000 -LEADER | |
|---|---|
| fixed length control field | 02749nam a22005057a 4500 |
| 001 - CONTROL NUMBER | |
| control field | sulb-eb0024653 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | BD-SySUS |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20160413122450.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 130125s2013 gw | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9783642361661 |
| -- | 978-3-642-36166-1 |
| 024 7# - OTHER STANDARD IDENTIFIER | |
| Standard number or code | 10.1007/978-3-642-36166-1 |
| Source of number or code | doi |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK7888.4 |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TJFC |
| Source | bicssc |
| Subject category code | TEC008010 |
| Source | bisacsh |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.3815 |
| Edition number | 23 |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Czerwinski, Robert. |
| Relator term | author. |
| 245 10 - TITLE STATEMENT | |
| Title | Finite State Machine Logic Synthesis for Complex Programmable Logic Devices |
| Medium | [electronic resource] / |
| Statement of responsibility, etc. | by Robert Czerwinski, Dariusz Kania. |
| 264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE | |
| Place of production, publication, distribution, manufacture | Berlin, Heidelberg : |
| Name of producer, publisher, distributor, manufacturer | Springer Berlin Heidelberg : |
| -- | Imprint: Springer, |
| Date of production, publication, distribution, manufacture, or copyright notice | 2013. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | XV, 172 p. |
| Other physical details | online resource. |
| 336 ## - CONTENT TYPE | |
| Content type term | text |
| Content type code | txt |
| Source | rdacontent |
| 337 ## - MEDIA TYPE | |
| Media type term | computer |
| Media type code | c |
| Source | rdamedia |
| 338 ## - CARRIER TYPE | |
| Carrier type term | online resource |
| Carrier type code | cr |
| Source | rdacarrier |
| 347 ## - DIGITAL FILE CHARACTERISTICS | |
| File type | text file |
| Encoding format | |
| Source | rda |
| 490 1# - SERIES STATEMENT | |
| Series statement | Lecture Notes in Electrical Engineering, |
| International Standard Serial Number | 1876-1100 ; |
| Volume/sequential designation | 231 |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Introduction -- Definitions and Basic Properties -- Synthesis of FSMs -- State Assignment Algorithms -- Theoretical Background of Technology-Dependent Optimization -- The Algorithm of Area Optimization Based on Graphs of Outputs -- Conclusions -- Output File Format -- Conclusion. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc. | This book is a monograph devoted to logic synthesis and optimization for CPLDs. CPLDs' macrocell can also be interpreted as programmable AND-fixed OR structure, well known as PAL-based structure. The question is: what should be done when the number of implicants representing function exceeds the number of product terms available in a logic block. The answer is ... in the book. Logic synthesis and optimization methods dedicated for PAL-based structures are proposed. The methods strive to find the optimum fit for the combinational logic and finite state machines to the structure of the logic device and aim at area and speed optimization. The theoretical background and complete strategies are richly illustrated with examples and figures. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Engineering. |
| Topical term or geographic name as entry element | Logic design. |
| Topical term or geographic name as entry element | Engineering design. |
| Topical term or geographic name as entry element | Electronic circuits. |
| Topical term or geographic name as entry element | Engineering. |
| Topical term or geographic name as entry element | Circuits and Systems. |
| Topical term or geographic name as entry element | Logic Design. |
| Topical term or geographic name as entry element | Engineering Design. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Kania, Dariusz. |
| Relator term | author. |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY | |
| Title | Springer eBooks |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Relationship information | Printed edition: |
| International Standard Book Number | 9783642361654 |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| Uniform title | Lecture Notes in Electrical Engineering, |
| International Standard Serial Number | 1876-1100 ; |
| Volume number/sequential designation | 231 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | <a href="http://dx.doi.org/10.1007/978-3-642-36166-1">http://dx.doi.org/10.1007/978-3-642-36166-1</a> |
| 912 ## - | |
| -- | ZDB-2-ENG |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | |
| Koha item type | |
No items available.