Embedded Multimedia Security Systems [electronic resource] : Algorithms and Architectures / by Amit Pande, Joseph Zambreno.

Part I: Multimedia Systems -- Introduction -- Advances in Multimedia Encryption -- Securing Multimedia Content using Joint Compression and Encryption -- Part II: Examples -- Polymorphic Wavelet Transform -- The Secure Wavelet Transform -- Chaotic Filter Banks -- Chaotic Arithmetic Coding -- Conclusion.

Embedded multimedia systems have been widely deployed in a multitude of applications, yet their use has lead to increasing concern over the security of the resultant multimedia data. This unique text presents a new perspective on the design of such multimedia systems. Opening with a detailed review of existing techniques for selective encryption, the book then examines algorithms that combine both encryption and compression, inspiring the reader to develop novel solutions to video encryption problems. The work also presents a selection of specific examples of the design and implementation of secure embedded multimedia systems. Topics and features: Reviews the historical developments and latest techniques in multimedia compression and encryption Discusses an approach to reduce the computational cost of multimedia encryption, while preserving the properties of compressed video Introduces a polymorphic wavelet architecture that can make dynamic resource allocation decisions according to the application requirements Proposes a light-weight multimedia encryption strategy based on a modified discrete wavelet transform Describes a reconfigurable hardware implementation of a chaotic filter bank scheme with enhanced security features Presents an encryption scheme for image and video data based on chaotic arithmetic coding This text will be of great interest to anyone interested in the marriage of video coding, encryption and hardware implementation, be they students of computer science, researchers in computer communications and security, or practitioners involved in algorithm and hardware engineering, and chip and system architecture.